DEVELOPMENT OF A NON-BINARY ERROR CONTROL DECODER FOR SOLID STATE DRIVES

OMOWUYI OMONIYI OLAJIDE2023-09-212023-09-212021-03-26https://teras.ng/api/asset/document/cda4b17e-3155-4c6e-beb1-ed75d20fca81https://teras.ng/catalog-item/eeb9317e-41c7-4548-866c-55859c2d1951http://dspace.teras-network.net:4000/handle/123456789/7965This dissertation presents the development of a non-binary error control decoder for solid state drives that require high throughput when reading data for error correction. The miniaturization of chip fabrication has made flash memory cells of Solid State Drives (SSDs) susceptible to distortion and error.DEVELOPMENT OF A NON-BINARY ERROR CONTROL DECODER FOR SOLID STATE DRIVESResearch Theses