DEVELOPMENT OF A NON-BINARY ERROR CONTROL DECODER FOR SOLID STATE DRIVES

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dc.contributor.authorOMOWUYI OMONIYI OLAJIDEen
dc.creatorOMOWUYI OMONIYI OLAJIDEen
dc.date.accessioned2023-09-21T15:35:29Z
dc.date.available2023-09-21T15:35:29Z
dc.date.issued2021-03-26en
dc.description.abstractThis dissertation presents the development of a non-binary error control decoder for solid state drives that require high throughput when reading data for error correction. The miniaturization of chip fabrication has made flash memory cells of Solid State Drives (SSDs) susceptible to distortion and error.en
dc.identifier.urihttps://teras.ng/api/asset/document/cda4b17e-3155-4c6e-beb1-ed75d20fca81en
dc.identifier.urihttps://teras.ng/catalog-item/eeb9317e-41c7-4548-866c-55859c2d1951en
dc.identifier.urihttp://dspace.teras-network.net:4000/handle/123456789/7965
dc.publisherAhmadu Bello University Zariaen
dc.titleDEVELOPMENT OF A NON-BINARY ERROR CONTROL DECODER FOR SOLID STATE DRIVESen
dc.typeResearch Thesesen
thesis.degree.levelMastersen
thesis.matric.numberP17EGCP8074en
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